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atmel corporation ? 2325 orchard parkway ? san jose, ca 95131 tel (408) 441-0311 ? fax (408) 487-2600 ? web site: http://www.atmel.com innovative techniques for extremely low power consumption with 8-bit microcontrollers arne martin holberg, avr project manager and asmund saetre, avr marketing manager summary with the increasing use of microcontrollers in a ll sorts off applications, low power has become an very important parameter when choosing microcontrollers. today?s microcontroller designs are often battery or signal wire powered applications replacing passive or mechanical components. common for them all is the requirement of very low power consumption but with enough power to fill the specification of the prod uct. this white paper will highlig ht some of the challenges of modern microcontroller design and how the new picopower? techniques used in the atmel ? avr ? microcontroller is addressing them.
l ow p ower t echniques for m icrocontrollers 2 7903a ? avr ? 2006/02 table of contents introduction to power c onsumption of mcus ........................................ 3 why is low powe r important? .......................................................................................3 low power pa rameters ..................................................................................................3 active vers us sleep........................................................................................................3 how to lower power consum ption in sleep mode ................................ 5 leakage current.............................................................................................................5 active peri pherals ..........................................................................................................5 the 32 khz crysta l oscillator.........................................................................................6 very low-power os cillators versus 32 khz oscillators ..................................................6 the avr picopowe r technology ............................................................. 6 sleep power consumption techniques inco rporated by picopower technology .........7 active mode power consumpti on techniques in corporated .......................................... by picopower technology ..............................................................................................9 conclusion....................................................................................................................1 5 editor's notes .......................................................................................... 16
l ow p ower t echniques for m icrocontrollers 3 7903a ? avr ? 2006/02 introduction to power consumption of mcus why is low power important? in the same way that fuel consumption is important in everything from scooters to oil tankers, power consumption is a key paramete r in most electronics applications. the most obvious applications for which power consumption is critical are battery-powered applications, such as home thermostats and se curity systems, in which the battery must last for years. low power also leads to smal ler power supplies, less expensive batteries, and enables products to be powered by signal lines (such as fire alarm wires) lowering the cost of the end-product. as a result, low pow er consumption has become a key parameter of microcontroller designs. low power parameters although power consumption is the product of operating voltage (vcc) multiplied by the current consumption (icc), cu rrent consumption is usually the only measure considered when describing the power characteristics of a chip. this is a mistake because decreasing the operating voltage directly reduces the current consumption and the overall power drain. current consumption increases directly with the system clock frequency so keeping the system clock as low as possible is critical to keeping power consumption down. the clock frequency is affected by a number of factors that include the microcontroller?s surroundings and peripheral set as well as the architecture and the instruction set. risc microcontrollers typically execute in a single cl ock cycle but some architecture s divide the clock down in the same way as cisc architectures do before feeding it to the cpu. this situation leads to confusion about what clock frequency is really required to execute the target application. designers should pay close attention to the in struction set architecture when reading the current consumption numbers in a microcontroller?s datasheet. most datasheets provide power consumpti on numbers for the microcontroller with no peripherals running. the additional current drawn by the peripherals must be taken into account since all mcus have peripherals and their contribution to power drain can be significant. temperature is another factor. since higher temperatures lead to higher power consumption, designers should always consider the power numbers for worst-case temperatures. active versus sleep in many applications, the processor does not run continuously and peripherals may be idle much of the time. the overall power consum ption can be lowered by taking advantage of various ?sleep? modes available on virtually all processors. the most common sleep modes are power down? (pwd), power save (ps) and idle. in power down mode everything is shut down, including the clock source. in power save mode everything is turned off except a 32 khz cl ock running from a crystal to keep track of
l ow p ower t echniques for m icrocontrollers 4 7903a ? avr ? 2006/02 time. idle mode is a shallow sleep mode where only parts of the device are shut down but the main parts of the micr ocontroller are running. the advantage of having multiple sleep modes is the flexibility it provides to shut down any part of the microcontroller that is not absolu tely necessary to the function at hand. the amount of power that can be saved depends on the mode being using. for example with a 1.8v supply voltage operating at 1 mhz and 25oc, atmel?s atmega165p avr controller consumes 340 ua in active mode, 150 ua in idle mode, 0.65 ua in power save mode and a scant 0.1 ua in power down mode. figure 1: power budget since a microcontroller can spend substantial amou nts of time inactive, it is important to consider power consumption in sleep modes as well as active power consumption. many designers use a power budget to determine the average power consumption and to calculate the battery requirements. although a great deal of attention is paid to ac tive power consumption, the most important mode to consider really depends on the dut y cycle between the various sleep and active modes. in applications such as thermostats, keyless entry, or security systems the processor spends most of its time idle. for these applications, sleep mode may represent the lion?s share of power consumption and will be the most important parameter to consider.
l ow p ower t echniques for m icrocontrollers 5 7903a ? avr ? 2006/02 how to lower power consumption in sleep mode modern microcontrollers are built on digital cmos logic that is in theory, only consuming power when the logical or clock signals are ch anging state. a signal is toggled when it has a transition from ?0? to ?1? or vice versa. based on this theory, sleep current consumption should be equal to zero. in real life, the picture is a bit more complex. although sleep mode power consumption approaches zero, current leakage and peripherals that remain active can consume quite a bit of power. leakage current the temperature, the supply voltage and the process technology affect the leakage current. some microcontroller manufacturer s use proprietary processes specifically developed for low power operation based on years of research and experience. these processes can provide sleep currents down to 100 na due to the power-optimized process and the ability to operate at a true 1.8v su pply voltage. some microcontrollers that claim 1.8v operation voltage actually must use volt ages as high a 2.2v for analog modules or flash writing to work properly. atmel offers true 1.8v operation in which the memories and analog modules all operate at 1.8v. caution should be used when evaluating a microcontroller?s supply voltage specifications to verify that the supply voltage is a ?true? 1.8v. the trend of smaller and smaller process technologies has become very popular in recent years because they allow faster clocks and sma ller die sizes. however, current leakage is one of the real disadvantages of aggressive processes with small geometries. the rule of thumb is that the leakage, and thus the slee p current, increase as the process geometries decrease. process is also used very loosely. all micr ocontrollers are not usually made using a single process but with several different processes t hat are specialized for different sections of the device. the processes used for 8- and 16-bit microcontrollers typi cally range are from 0.50 down to 0.15 micron. active peripherals the biggest contributors to sleep mode power consumption are active peripherals. enabling internal analog or digital modules ca n cause a significant increase in the overall current consumption but can be difficu lt to evaluate. while well-documented microcontrollers describe this additional cu rrent consumption in their datasheet, others claim that this current consumption equals ze ro. this is very seldom a correct statement especially when it comes to analog features. when it is correct, the zero power features is likely to have poor performance. the power cons umption in digital logic is mainly due to the toggling frequency, the capacitive load, and the supply voltage. the power consumption in analog modules is, on the ot her hand, static. there is often a trade-off between power consumption and robustness, accu racy, speed and fast start-up time in analog modules. decreasing power consumption also often decreases the quality of the analog module.
l ow p ower t echniques for m icrocontrollers 6 7903a ? avr ? 2006/02 the single-most important analog module in terms of power cons umption during a sleep mode is the brown-out detector (bod). a bo d protects the microc ontroller when the supply voltage falls below its operating thre shold by resetting the device. this keeps the microcontroller in a defined state when the vcc is below its operating threshold. the bod is not important to the microcontroller while it?s in sleep mode but it is extremely important when it wakes up. therefore, as a rule, most microcontrollers keep the bod active during sleep mode and it contributes substantially to sleep mode power consumption. there are two ways of getting around bod po wer consumption in sleep: making a ?zero- power? bod or turning the bod off altogether. since the bod must be functional when the controller wakes up, making a zero-power bod may seem like the most attractive option. however, lowering the power to the analog module can make it very slow and make it respond too slowly to an out-of-range voltage supply. since the microcontroller is not running any code or writing or erasing the flash or eeprom in sleep mode, the bod is no t really necessary. however, it does need to be operational the moment the controller wakes up. the solution to this problem is to have the microcontroller shut down the bod when it enters sleep mode and start it again just before leaving sleep mode. this approach en sures the bod is functioning when it is needed without any current penalty while in sleep mode. the 32 khz crystal oscillator in many applications, the time spent in active mode is insignificant compared to the time spent in power save mode with everything turned off except a real-time clock and the brown-out detector. in these applications, the power consumed in power save mode (sum of pwd, bod and the 32 khz oscillator) is the most significant contributor to overall power consumption. therefore, lowering the current consumption of the 32 khz oscillator can significantly reduce overall sy stem power consumption. designers should be very thorough in evaluating the current consumed with the crys tal oscillator running. very low-power os cillators versus 32 khz oscillators there are, in general, two ways of timed wake fr om deep sleep: either by a rtc or by very low power oscillators (vlo). the difference between them is mainly the accuracy. the rtc allows proper timing due to the very accurate 32 khz oscillator while a vlo is very inaccurate and not suited for time-critical functions. the avr picopower technology the increasing use of battery and signal li ne powered applications mandate low power solutions. atmel has spent the last decade refining its technologies and architectures to achieve the industry?s lowest po wer consumption. the culmination of this effort is its new picopower technology which will be implement ed in new ultra low-po wer 8-bit risc avr microcontrollers to be introduced during 2006.
l ow p ower t echniques for m icrocontrollers 7 7903a ? avr ? 2006/02 sleep power consumption techniqu es incorporated by picopower technology sleep is often considered the most important low power mode, particularly in applications that spend the majority of their time ac tive. atmel?s picopower technology employs a number of techniques that result in the lo west sleep mode power consumption of any microcontroller on the market today. true 1.8v supply voltage the processes used in avr mcus support a power supply voltage range from 1.8v to 5.5v. the 1.8v operation is a true 1.8v op eration. which means that all the analog modules, flash, eeprom and ram run at 1.8v. true 1.8v operation ensures less power consumption as the consumption is the sum of current and voltage as well as allowing the battery supply to drop to 1.8v before being out of range. minimized leakage current the temperature, the supply voltage and the pr ocess affect the leakage current. atmel has used proprietary processes that have been specifically developed for low power operation based on years of research and experience. the leakage current of picopower avrs is less than 100 na. taking the bod to the sleeping bod although zero-power brown-out detectors (bod), such as that used in ti ? ?s msp430, can save a lot of power, they are notoriously slow and can require a millisecond to detect a below-threshold voltage. the slow response ti me could put the controller at risk. atmel?s avr bod detects brown-out conditions in 2 microseconds but draws about 20 ua, adding substantially to the power down current of 100 na. as part of the picopower technology, atmel has maintained the high performance and relatively high current of the bod and saved po wer by simply turning it off when it is not needed. this approach results in the lowest overall power consumption and the highest possible performance with accurate detection at 1.8v, 2.7v and 4.5v. in addition to the slow response time on the msp430, there is so me concern that its detection level is only 1.4v, substantially lower than the 2.2v requ ired to have all the controller?s features available. since there is no need for the bod while the mcu is in the deep sleep mode, the picopower bod can be turned off in extended standby, standby, power save and power down modes. the picopower bod-disable feature is enabled by the application using a two-step secure operation and is fully automatic. when ent ering sleep, the bod is disabled after the mcu has entered the sleep mode, and enabled to veri fy that the power supply is sufficient before the mcu is allowed to wake from slee p. if the power supply is not sufficient, the mcu will enter a reset mode before any code execution takes place. while in sleep mode, the only critical param eters to handle are the ram and register contents. on avr microcontrollers these contents are valid until ~0.3v vcc, while the
l ow p ower t echniques for m icrocontrollers 8 7903a ? avr ? 2006/02 avr?s power-on reset (por) triggers at ~1.0v. if a power supply voltage drop should occur while in sleep mode with the bod disabled, the sram and register co ntents will be valid until a por occurs. a por will enable the bod again and set the por flag to be read by the application firmware. the bod disable feature completely eliminat es any power consumption penalty for the bod during sleep mode and the mcu has full protection in active mode . ultra low power 32 khz crystal oscillator since the time spent in active mode can be in significant compared to the time spent in power save mode, power save mode is often the most important power consumption characteristic of a microcontroller. the latest 32 khz crystal oscillator design utilized in the avr mcus reduces the current consumption in power save mode to a level comparable to power down mode. competing microcontrollers offer power save current consumption as low as 700 na, including the oscillator and bod. with a supp ly voltage of 1.8 volts, the avr picopower technology achieves the industry?s lowest po wer save current consumption of 650 na with the 32 khz oscillator running and a sleeping bod.
l ow p ower t echniques for m icrocontrollers 9 7903a ? avr ? 2006/02 active mode power consumption techniques incorporated by picopower technology in theory, digital cmos logic consumes powe r only when the logical signals or the clock signals are toggling. a signal is toggled when it has a transition from ?0? to ?1? or a transition from ?1? to ?0?. when all the digital signals are static, like in power down mode, only leakage current and current used to enabled analog modules is consumed. the power consumption in an mcu can be ca lculated with the following equation: p = ? * f toggle * c load * v dd 2 where f toggle is the toggling frequency, c load is the capacitive load and v dd is the supply voltage. in addition a small adder is made by the digital logic?s leakage current and the current consumed by analog modules in idle mode but this minor components in active current consumption. toggling frequency the toggling frequency for a given device can be seen as the number of gates toggling to achieve a certain task. this can be reduced by minimizing both the number of gates and the number of times each gate needs to toggle. clock gating clock gating is used to reduce the toggling frequency. a clock signal can be stopped using a gating element. any clock distribution or cl ock domain that is gated is frozen and won?t consume any power. a gating element must han dle any spike issue on the clock signal. the principle of clock gatin g is depicted in figure 2. figure 2: clock gating principle
l ow p ower t echniques for m icrocontrollers 10 7903a ? avr ? 2006/02 the avr features three main levels of clock gating. figure 3: three main levels of clock gating clock gating level one: sleep functionality the first level of clock gating are the sleep modes that have always existed on the avr. the sleep modes gate the clock distribution to a group of functionality thereby enabling different levels of sleep and functionality. ? idle mode gates the cpu clock domain and the flash clock domain while the peripherals and interrupt system continue to operate. ? the adc noise reduction mode allows the adc to operate while most of the peripheral clock domains, in addition to the cpu clo ck domain, and the flash clock domain are gated. ? the power down mode gates all clock domains on the avr and only enabled asynchronous operation is allowed. the exte rnal oscillator is also stopped in power down mode. ? the power save mode is the same as power down mode except that the asynchronous timer can operate when it is enabled. ? the standby mode is the same as power down mode except that the main oscillator is kept running.
l ow p ower t echniques for m icrocontrollers 11 7903a ? avr ? 2006/02 ? the extended standby mode is the same as power save mode except that the main oscillator is kept running. the response time for wake-up from sleep mode is only six clock cycles when the internal rc oscillator or an external clock is sele cted as the clock source. power consumption during the wake-up session is less than in idle mode. this means that the avr can wake- up from sleep mode and re-enter the sleep mode again with extremely-low energy consumption and spend a very short time during wakeup and active mode. clock gating level two: po wer reduction registers the second level of clock gating is the powe r reduction register (prr). many peripheral modules are only used for a short period of time or not at all. the power reduction register contains control bits for disabli ng unused peripheral modules. the entire clock distribution to disabled peripheral modules is gated. this is more powerful than just disabling the module by its enable bit since th e modules io registers are disabled by the prr. the power reduction register is controlled by software that allows the user to turn on and off peripheral modules at any time. the curr ent state is frozen and all i/o registers are inaccessible when the peripheral module is disabled by the powe r reduction register. when re-enabled, the peripheral module contin ues in the same state as before it was disabled. disabling one peripheral module result s in a reduction of 5 to 10% of the total power consumption in active mode and 10 to 20% of the total power consumption in idle mode. clock gating level three: automatic clock gating designs without clock gating update all regist ers every clock cycle. if no change has taken place, the register is updated with its prev ious state, unnecessarily consuming power. automatic clock gating (or multi-level clock gat ing) only allows the clock through when an update is required (i.e. when a value has changed). rather than updating the register with the previous state, the clock to the register is gated. figure 4: design with and wi thout automatic clock gating
l ow p ower t echniques for m icrocontrollers 12 7903a ? avr ? 2006/02 one-phase clock system in many controllers, a significant amount of the overall power consumption is due to power consumption used in the clock distribution. avr microcontrollers feature a one-phase clock system that reduces power consumption below that of a two-phase clock system. capacitive load and low power ic design techniques the avr design flow is an optimized and power- driven design flow. state-of-the-art cad tools are used for synthesi s, layout and validation. hold time buffers it is necessary to infer hold time buffers in the data path between registers to compensate for any clock skew between clock tree branches in a design. hold time buffers consume power due to capacitive load. the process of hold time buffer implementation in avr controllers is optimized to keep the amount of hold time buffers to an absolute minimum. toggle information toggle information is collected on simulations of actual application code to identify areas of the design that toggle the most. this inform ation is used by the synthesis tool which focuses to optimize those areas that toggle the most to reduce power consumption. low power processes and libraries atmel corporation manufactures avr microcont rollers using proprietary low-leakage flash processes and design libraries that contain many complex cells. complex cells have shorter wires that give much lower capacitive loading and less toggling due to an optimized structure with fewer transistors. figure 5 shows a simple example of a complex cell compared to simple cells. figure 5: complex cell example
l ow p ower t echniques for m icrocontrollers 13 7903a ? avr ? 2006/02 ultra low power memory there is often a trade-off between power cons umption and robustness, accuracy, speed and fast start-up time in analog modules. the analog modules therefore require other methods differing from the digital designs to maintain good perfor mance and still achieve low power consumption. avr mcus feature high -quality analog modules with more current consumption, but turns them off whenever they are not in use. this approach minimizes current consumption without sacrif icing accuracy or performance. flash memory power consumption and flash sampling flash memory is an analog bloc with a st atic current consumption. traditional flash memory designs are always enabled while in active mode. however, at low clock frequencies the flash read time is less than the clock period so it can be disabled to significantly reduced power consumption. when the clock is running at a few mhz or less, avr controllers use a technique called ?flash sampling? that enables the flash for only about 10 nanoseconds to sample the array?s c ontents and then immediately disables it thereby, reducing average power consumption. (figure 6). figure 6: flash sampling system figure 7: flash sampling vs flash always on the flash sampling technique enables a robust, low power flash design that operates from 1.8 to 5.5v.
l ow p ower t echniques for m icrocontrollers 14 7903a ? avr ? 2006/02 true 1.8v memory operation the processes used in avr mcus support a power supply voltage range from 1.8 to 5.5v. the 1.8v operation is a true 1.8v operation. this means that all the analog modules, flash, eeprom and ram run at 1.8v enabling really low power appl ications. the wide power supply range utilizes the complete ba ttery life in a battery-driven application. pin leakage and digital input disable register avr controllers mix adc and digital i/o on the same pins. using one adc and a multiplexed input, the microcontroller scans a nu mber of pins. multiplexing adds flexibility to low pin-count devices but raises increase po wer consumption. a digital input is basically built by two transistors, creating an input buffer as shown in figure 8. as long as valid high or low voltage levels are applied to the buffer, there is no problem. however, applying voltages in the area of vcc/2 will create a leakage current through the buffer as both transistors will open slightly. figure 8: avr mixed analog and digital i/o since the analog voltage level present at the input adds static power consumption, it is important that the microcontroller be able to disable the digital input. automatic disabling based on the adc?s multiplexer is not possibl e since the multiplexer is controlled by the microcontroller?s firmware and is not predi ctable by the microcontroller itself. avr controllers solve this problem with a dedica ted input disable register, didr, with one disable bit per analog input.
l ow p ower t echniques for m icrocontrollers 15 7903a ? avr ? 2006/02 the digital input buffers are automatically di sabled when sleep mode is entered except for those pins used by the input signal to wake the mcu from a sleep mode. the didr contributes to decreased overall power consumption. conclusion at the end of the day, power consumpti on is about numbers and picopower numbers speak for themselves. the table below compares the leading low-power microcontrollers, ti msp430fxxx and atmel?s picopower avrs. power save current consumption with 32 khz running device typical 2.2v @25c maximum 2.2v @85c comment MSP430F435 1.1 ua 6 ua with zero power bor msp430f2131 0.8 ua 2.3 ua with zero power bor atmega165p 0.65 ua na with sleeping bod power down current consumption device typical 3.0v/5.0v @25c maximum 3.0v/5.0v @85c comment 78ko/kx2 5.0v na / 1 ua na / 20 ua 3.0v numbers not available r8c/tiny 3.0/5.0v 0.7 ua/ 0.8 ua 3 ua/ 3 ua msp430f4xxx 0.1 ua / na 3.5 ua/ na max 3.6v vcc msp430f2xxx 0.1 ua / na 1.9 ua/ na max 3.6v vcc atmega165p 0.1 ua / 0.6 ua 2 ua/ na 5.0v numbers not available
l ow p ower t echniques for m icrocontrollers 16 7903a ? avr ? 2006/02 editor's notes about atmel corporation atmel is a worldwide leader in the design and manufacture of micr ocontrollers, advanced logic, mixed-signal, nonvolatile memory and radio frequency (rf) components. leveraging one of the industry?s broadest in tellectual property (ip) technology portfolios, atmel is able to provide the electronics industry with complete system solutions. focused on consumer, industrial, security, communica tions, computing and automotive markets, atmel ics can be found everywhere you are ? further information can be obtained from atmel?s web site at www.atmel.com/avr . contact: asmund saetre, avr marketing manager at atmel norway, vestre rost en 79, 7075 tiller, norway, tel: (+47) 72 88 43 88 email: asaetre@atmel.com ? atmel corporation 2006. all rights reserved. atmel ? , logo and combinations thereof, everywhere you are ? , avr ? , and others are the registered trademarks, pico power? and others are trademarks of atmel corporation or its subsidiaries. other terms and product names may be the trademarks of others.

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